Protel Users FAQ

Updated 2002-08-08



the independent Protel FAQ

Protel Users FAQ

Frequently Asked Questions (with answers) about the Protel schematic, layout, and simulation software; and related general circuit design tips.

Lots of stuff missing. Please help us fill it in. Send improvements to the FAQ maintainer, currently David Cary <david_cary at> (but surely *you* could make a better FAQ).

There is a Protel Users mailing list. Smart Protel users subscribe to both of the following lists, since traffic flips between them when one is (temporarily) offline. /* was */

mailing list status page

Mailing list archive for the Protel Users mailing list:

Mailing list archive for the Protel Users mailing list:

Older mailing list archives for the Protel Users mailing list: | . /* Some older messages are archived in . -- is this still online ? */ /*

Abd ul-Rahman Lomax has put another archive of the Protel mailing list online. Go to and visit abdlomax. In the shared folder, the file is -- is this still online ? */

For general PWB design questions, the mailings lists available at may be more appropriate.

design flow

If you have a Protel document that someone has already set up properly, it's easy to make minor changes to the PWB. The typical sequence goes like this:

  1. You get the bad news: "Oops. The holes are too far apart for Component X on Board Y. Move them closer together on the next revision, OK ?".
  2. You find the ".ddb" file for Board Y, double-click on it, then find the ".PCB" file.
  3. You increment the revision number on the silkscreen on the board.
  4. You make some changes to the board.
  5. Hit "Tools | Design Rule Check | Run DRC" to run a design rules check. [Why doesn't typing T D R work ?]. All too often your "fixes" cause other problems. Return to step 4.
  6. Hit the "Explorer" tab on the far left. Find the file of type ".cam", click it, and then hit F9. All the Gerbers, the Drill Drawing, the Drill Guide, the BOM, and other files will be generated and placed in "CAM for..." folder inside the ".ddb" file and copied to a (hopefully appropriate) direction elsewhere on your hard drive.
  7. You exit Protel, find the new Gerbers. You copy a "readme.txt" file into that folder. You right-click on the folder they are in and choose "Add to". Then rename the file to [part number][revision number] ".zip".
  8. Email the ".zip" file to your favorite board house, *and* another copy to your favorite assembly house. The assembly house makes stencils from the ".GTP" (if you have SMT components on top) and ".GBP" (if you have SMT components on bottom) files while the board house is etching the board.
  9. Find the parts listed in your BOM, buy them, and send them to your assembly house.

getting started

If you don't have a Protel document that someone has already set up properly, it's up to you.

Generally starting from "scratch" you draw a schematic #start_schematic, simulate it (or manually prototype it on solderless breadboards), then lay it out #start_layout.

Getting started on a schematic

The default ERC matrix is pretty good. Most people change ``Tools | ERC | Rule Matrix'' so that the entire ``Unconnected'' row and column is warnings and errors.

See ``input port'' for an explaination of why the input port row and column is identical to ``output pin''.

``The main change to the ERC matrix that I'd suggest over the default is to set the "Unconnected" row and column to either warning (yellow) [or error (red)] instead of No Report (green). This will require you to put a "No ERC" marker on any unconnected pins, but that seems like a good idea, anyway.

The other change I made was to make the "Unspecified Port" row and column all error (red), as I don't want to have ANY port unspecified. '' -- Dwight Harm Trax Softworks, Inc. 2001-06-12

Getting started on a layout

If you already have a board designed using some other software, it's often quicker and more accurate to try to import those design files into Protel than to start from scratch. Check out the conversion tools .

When you're doing a new board "from scratch", the easiest way to start a new layout (assuming you already have a schematic):

In theory, the correct footprints for all your components should show up in a big pile to the right of the board. But I've never seen that happen perfectly the first time. While looking at the PWB, you'll need to "add" libraries of footprints. When you find the right shape in the footprint library, remember the name of that footprint, then flip back to the schematic. While looking at the schematic, you'll need to double-click the components and make sure the right footprint name is filled in each "footprint" box. Typically you change a few things and do step (4), change a few more things, repeat until all the footprints look right.

Then you'll want to set up "Design rules" for minimum hole size, minimum annular ring, etc. (... vias ...)

Draw 50 mil tracks on the keep-out layer, "continuous" (the start of one track snapping exactly to the end of the last track), centered on the board edge, completely around the board. (This forces tracks on the signal layers to stay at least 25 mil away from the board edge). Set up a design rule to force components to stay even further away from the edge.

Draw 60 mil tracks on the ground plane centered on the board edge, completely around the board. Do the same for every power plane. This makes the copper plane stop 30 mil way from the board edge. (If the planes run all the way to the edge, then they will be exposed after routing, and it would be very easy for them to short together). [FIXME: would it be better to run *only* the ground plane right up to the edge ?]

Here's some settings/preferences that seem to cause a lot of unnecessary trouble.

Q: Can Protel handle large boards ?

Protel can handle some huge boards. Size Of board 23.359 x 15.88 sq in 2600 components, 19,823 pads, 13,464 vias [FIXME: has this gone offline ?]

The mouse-wheel problem ... [FIXME]


large schematic designs

When you do a large design, it's worth your time to learn about global operations. ``global operations ... the single greatest feature of Protel ... very powerful and well worth spending a day to understand.'' -- Ian Wilson. You'll find them very useful in both the schematic editor and the PWB layout editor.

With large schematic designs, it helps reduce clutter to use busses and hierarchy. If you have several sections that are almost identical (say, independent filters and amplifiers for Left and Right stereo channels), it's helpful to put the duplicated stuff on one sheet (``one channel''), and include 2 copies of the sheet symbol on the top-level schematic page. Then any changes you make on that page of the schematic are automatically made to both channels of the PWB.

[For the purpose of making connections between sheets,] ``Bus labels/names are in the format P[0..15], which includes the nets P0 through to P15 (please note the square brackets and the two dots). No other naming convention is accepted. . You cannot group/bus nets with names such as "clk", "data", "strobe", etc. You cannot assign a bus a name such as "i2c".'' -- Brendon Slade on 2001-01-03 [It's fine to name a bus "i2c" on a single sheet, and attach wires net-labeled "clk", "data", etc. to it.]

``I've used (and liked!) the hierarchical sheet support, with "Sheet Symbol/Port Connections" selected for netlists, synch, and ERC. ... [If] I set "Net labels and ports global", my sheet entries that were connected on a top-level schematic page no longer appear connected, unless the port names are identical. Essentially, any wiring between sheets at the top-level is now meaningless -- it has no effect on the netlist.'' -- Dwight Harm 2001-01-02

``global is evil, as I often want to use a sheet several times in a design...'' -- Dwight Harm 2001-01-02

Dwight Harm 2001-01-03 :

  1. Port names do not need to match bus net names, but should have the identical numeric range, e.g., "[0..7]".
  2. Port names must match sheet entry names exactly (just as they do for single signals).
  3. On the upper level schematic, the sheet entries must be connected by a bus. The bus may be named or unnamed. The only restriction on the name is that it have the same numeric range. The textual part is irrelevant.

symbols for schematic

(schematic library design tips for making new symbols.)

If you want a symbol that's not already in the #libraries , then you must make it yourself in your own library.

When designing a new schematic symbol, Ian Wilson says: "don't use hidden pins ... ever. The are not logical or intuitive and new users consistently have problems with them."

There seem to be 2 kinds of schematic symbols:

When making a new shematic symbols, it helps to

(The pin "numbers" on the schematic symbol must match up with corresponding "numbers" on the PWB footprint. The pin "names" on the schematic are just for documentation.)

Bug: The "update schematic" button really ought to (1) take the version of the part in memory (which you have just edited) and save it to disk, *then* (2) use the version on disk to update open schematics.

But at the moment, it only does step (2).

Workaround: Always ``press the "file save" button before you press the "update schematic" button.'' -- "Graeme Zimmer" on 2001-04-04 05:38:42 PM

Q: How do I copy a schematic symbol from some other library to my own personal schematic symbol library ?

A: After I right-click on the name of the component (in the left pane of the symbol editor), I choose "copy". No more clicks needed. Then I switch to my own personal libraries, right-click in that left pane, and choose "paste". Don't have to click again here either. In the schematic symbol editor, there's no way to do that from the menu options -- you *must* do it with the right-click thing. I wish for a ``Edit | Copy Component'' and a ``Edit | Paste Component''. Unfortunately, the ``Tools | Copy Component...'' does *not* do the right thing. Then rename it.


In an ideal world, layout would consist of

  1. (1) setting up: drawing the outline of the board, marking and locking mechanical areas.
  2. (2) placing the components with auto-place,
  3. (3) connecting the components with auto-route.

In reality (as of 1999), one usually does

(1) setting up: drawing the outline of the board, marking and locking mechanical areas.
(1b) "Design Options Options" and pick reasonable grid values
  (25 mil grid was popular with all-through-hole boards;
  10 mil grid (exactly 0.254 mm) seems to be popular with surface-mount boards)
(2)  place components with auto-place
(3)  laugh at the stupidity of today's computers
(4)  Manually group components by going to the schematic,
	selecting a related group of components, doing "Tools | Select PCB components",
	and moving each group near the final position, using human intuition to place each group.
(5)  Use human intuition to shuffle the components of each group.
	If each group can be packed into a small rectangle (a "room"),
	and there is enough room on the board
	to place every rectangle ("room") without overlapping,
	then that makes things easier.
(6)  route "critical nets" and lock them down
(7)  auto-route
  (8) move component(s) to make more room in congested areas
  (9) Put in traces you just made more room for
  (10) re-connect component(s) you just moved
  (11) Do DRC
until everything's wonderful.

The next step after Layout is creating the CAM files to go to manufacturing.

board outline

setting up: drawing the outline of the board, marking and locking mechanical areas.

Draw (typically on layer Mech 2) the outline of the board, where all the mounting screws go, and where mechanical constraints are. Leave that layer on while placing components so you know what to work around.

(slots, "rectangular holes", concave boards, ...)

"Hamid A. Wasti" on 2001-02-12 wrote:

Subject: Re: [PROTEL EDA USERS]: Rectangle holes

Brad Velander wrote:

> a typical shop might have a 32mil diameter
> router as their smallest size
> router bit and therefore your corners will have a 16mil radius.

It is a bad idea to use an inside radius same as your router bit radius. This requires the router to come to a complete stop and then start moving at 90 degrees. There will invariably be some chatter and the router will cut into the sides. It is better to make a minimum radius larger than the router radius so the cut is programmed as an arc which will give a lot better results.


Many people put layer stack-up text (also called a ``layer name block'') in some unused corner of the PWB:

I always create a "layer stack-up window" on each copper layer of the PCB. (i.e. The top will have a "1", the next layer a "2" etc.) For a 6 layer board you will see a strip of numbers 123456. Leave the solder mask off the top & bottom around this strip. That way you can hold the "window" up to the light & confirm that they actually built the stack-up you requested, and you don't need to cut up a test coupon. You have to remember to "draw" the numbers as negatives for the plane layers, because you are actually drawing non-copper. Remember to leave copper off all layers around this window, so the board is somewhat transparent.

-- Mark Geddes

Dennis Saputelli put his version online:

Ian Wilson further explains:

So in words: If I have layer 3 as a negative plane layer, I will simply have a numeral "3" on the layer. To the left I will have a small fill, just large enough to remove copper under the numerals "1" and "2" and to the right I will have another fill, just large enough to remove the copper under "4", "5" and "6" (for example). ... Obviously this changes depending upon number of layers and plane distribution. An automatic, Protel-generated, graphic would be useful. ... So each signal layer has just a simple numeral. Each plane layer has the numeral and two fills, one on each side, that allows light to shine through to the board. Sample showing this is available from egroups file store:

Abd ul-Rahman Lomax continues:

I put down, on, say, the fabrication layer, a series of numbers from 1 up to the number of layers. I draw a box around this, using a small track size. This box is on a fabrication layer. I edit each number so that it is on the appropriate layer. On negative layers, I place 50 mil track to fill in all but an area over the number of that layer. ... Since I typically use a 50 mil track to keep negative layers clear from the board edge, that size is available ... The blowouts that are visible through the board, with the plane layer numbers between them, leave an hour-glass type of shape instead of a rectangular box, but this is harmless.

Placement (of components):

Once you've sketched the outline of the board, it's time to place components.

Some people use ``Rooms'' to help put related components in the same general area (digital stuff here, analog stuff there). If you break your schematic into several pages, this automatically happens. If you just have one big schematic, `` Select the components one desires to associate with a room. Design/Classes/Component/Add/Class_Generator/Selection/True and create a class of the selected components. Then assign that class to the room. '' -- Abdulrahman Lomax (2001-04-09)

One under-appreciated ``component'' is the ``virtual short'', also known as a ``star point'' which can be used as a ``star ground''.

Common problems during component placement:


Q: "I'm designing a board with four amplifier channels. I have a layout that I like and would like the same layout for each channel. What is the best method for doing this ?" -- Roy Frazier


Select the block and copy it 3 times, then select each one, and use a global edit to replace all part designators with some systematic change, such as replace C101 with C201... C401 like this {C1=C2} and {R1=R2} and {U1=U2} etc. I haven't found a really cute way to do this, although originally naming all parts something like CZ01,CZ02...CZnn, and RZ01,RZ02...RZnn, etc. would make the replace much easier, as {Z=1}, {Z=2}...{Z=4}.

Duplicate the schematic section 3 times [can't you just put one section on a schematic sheet, then refer to that sheet 4 times on the main schematic sheet ?], rename the nets and components with global edits, update the board from the schematic.


"Design | Netlist Manager | Menu | Update Free Primitives From Component Pads"

to fix the trace nets.

Now, the board should check against the schematic nets without errors.

-- Jon Elson 2000-12-15


You will probably find the QualEcad add-in tool useful also. It will automatically generate new designators for selected sections of layout that you have copied. Find it at:

-- Tim Hutcheson 2000-12-15

Footprint Library design tips

If the footprint you want isn't already in the #libraries , then you'll have to make your own footprint.

If you're lucky, you don't need to create your own footprint library. Most boards can be built out of components that fit the standard footprint libraries.


If you create a new library, please please please embed a description of the library -- your name, email address, web page, the date it was created, the date of this revision, etc. Create an extra dummy component named "__about" with a bunch of "top overlay" silkscreen strings that list this text information ("metadata"). If you use the ".ddb" format, put a simple text file "readme.txt" in each ".ddb" database with this information.

When making a new footprint, it helps to

Editing footprints:

footprint design tips:

Common footprints people design:

Q1a: How do I make a custom pad shape ? (I need something other than the simple pads shapes built-in to Protel: "circle", "rectangle", "oval", and "octagon")

A1: Build the custom pad shape out of several overlapping pads on the top layer (and optionally a through-hole pad on the multilayer). Assign them all the same reference designator.

A2: For even more flexibility, build the custom pad shape out of overlapping fills on *both* the top paste mask layer *and* the top copper layer. Place a small simple pad touching those fills. (Either a surface-mount pad on the top layer or through-hole pad on the multilayer).

Q1b: I tried that, but when I placed that footprint on my PWB, it lights up bright green with lots of DRC errors.

A1b: run "Design | Netlist Manager | Menu | Update Free Primitives From Component Pads" and run another DRC check.



Watch out if you use any copper *tracks* embedded in components. If you run the autorouter on a board with a Protel Sot-89 footprint (or other footprints with embedded tracks) , often the autorouter deletes the "trace" part of the footprint. You then need to refresh the footprint. [Has this bug been fixed ?]

Work-around 1: To stop the auto-router using the space freed by deleting your track you can protect the area with layer-specific keepout tracks and fills. -- Ian Wilson

Work-around 2: make sure those track segments are part of a trace that is terminated at both ends by a pad or via.


Under "Design | Rules... | Routing | Routing Layers" there should be one rule. Select it and hit "Properties...". I set the top signal layer to "horizontal", the bottom signal layer to "vertical", before running the autorouter. On some boards setting the top to "vertical", and the bottom to "horizontal", then the autorouter worked better. One might think that giving this autorouter the freedom to choose "Any" would help. When I tried this, it always made a tangled mess.

I've never seen the autorouter complete a board the first time. Usually it's because I put a few components so close together and given the router such difficult constraints, that there is no room to get all those nets routed without some constraint violation.

When the software realizes that it's impossible to complete with the constraints you gave it, it "finishes" with lots of unrouted nets, and sometimes traces that clearly violate your given constraints. If it's really ugly, hit undo (ALT+BackSpace). If it's not too bad, you can leave the traces it put down, and that gives it a starting point to start next time -- faster than starting from scratch.

Find where the routing congestion is, and manually scoot the components in that area further apart (so there's more room for wires between them). Then start the autorouter again.

It can help guide the autorouter to manually route some traces and lock them down. Sometimes manually routing a trace, then running "Tools | Design Rule Check... | Run DRC" helps you find overly-conservative design rule constraints that make it impossible to route a board.

It's really helpful if there are *no* DRC errors before starting the autorouter.

The Multilayer should contain *only* and *all* through-hole pads and vias. Anything else (tracks, text, etc) on the multilayer confuses the autorouter.

------------------- Begin Copied Message -------------------

I have been using P98/SP3 since it first came out. I had some problems similar to yours when I first started using it, then I developed a check list of what to do (and not do) and have had no problems. Several of these are in Protel's Knowledge Base (Item 1694); however, these are what I have found to be effective.

I do Item 1 and 2 since I "never" have a board where the keep out is defined by the actual board edge. If I need a rounded keep out region, I use several short line segments. Several people have commented that they save all mechanical layer information to a separate file and restore it after routing. I don't unless I have routing problems.

Item 7 is extremely important, if I am trying to test route a section, I delete the components not being routed rather than try moving them outside the keep out region. Also beware the object that got moved outside the visible region due to not deselecting it prior to selecting and moving another object!

Item 8 came about when I had a special polygon on the top outline layer even though it was not to affect routing or vias. Removing it allowed the route to proceed normally.

Regarding Item 11, the autorouter will use the maximum width specified for traces, which can be a problem if that trace connects to fine pitch components.

NOTE: using the circuit board wizard violates these guidelines if you plan on autorouting.

------------------- End Copied Message -------------------

Several of the above items should no longer be required (according to the NEW release information); however, it is a good starting point such that any deviations should be well understood...

-- David W. Gulley on 2001-03-28

``To make a circular board you would create the keepout circle(arc) and then surround it with a rectangle so it will work. The router will stay within the circle, but requires the rectangle to initialize.'' -- Colby Siemer

Q: I've done all the above, and my board *still* refuses to auto-route !


For systematic troubleshooting, there is a generic process I call chunking. Take the design and divide it into two parts, each approximately half of the design. You can do this on the PCB, since nets are carried by the pads. Delete the parts in one half (obviously you are doing this with a copy of your design so you can completely screw it up without losing anything). If the autorouter now runs, the problem is probably in the half you deleted. By extending and following this process recursively, you may be able to find, in a few operations, exactly what part or primitive is causing difficulties.

Obviously, if you change something and it now routes, what you changed almost certainly contains the problem.

Abd ul-Rahman Lomax on 2001-03-28 03:56:11 PM

A2: We're still tracking down some obscure bugs. If you can reduce the board down to a couple of parts that refuse to auto-route, please let us look at it. email one copy to Protel's tech support, and send another copy to a volunteer on the PEDA mailing list. (To get the absolute fastest response, post it on a web page, then email that page's URI to the entire PEDA mailing list).

manual routing

manual routing

Sometimes the autorouter gives a ``net routed 99.8%'' message, leaving just a few traces for you to manually route. Normally doing a DRC helps you jump right to the problem [FIXME: step-by-step explaination ?], except when the net goes all over the board like GND or +3V and there's a unconnected island somewhere.

Q: How do I find the unconnected island ? A: ``My usual approach is to turn off all layers except the Connection layer, leaving just one of the Mech layers turned on to keep from forcing TopLayer on. Zoom out to see the whole board, and you should be able to see the connection, though it's probably very short, just trying to connect pads on opposite sides of the board or similar. Place the cursor on the spot, zoom in to an appropriate level, and then turn the copper layers back on to see what's what. This technique has always enabled me to find the missing connection. It's usually one which I thought was connected! '' -- Steve Hendrix
``Also it may help to turn off any displayed grid.'' -- Abd ul-Rahman Lomax

Q. I just placed some vias and free pads. Why won't Protel let me route traces to them ?

A. Protel normally won't allow you to make the mistake of shorting 2 different nets together. Vias and free pads default to a net property of "No Net".

When I'm placing a track:

  P T click, click, click, click

Each click of the mouse drops a new segment of track. I try to start routing from something that already has a net. Then I *can* route to a "No Net" via or track by getting close and momentarily turning off "Avoid Obstacle":

  click, click, shift+R shift+R click, click, shift+R click, click, click ... click Esc Esc.

(It takes at least 2 clicks to place a segment "into" and then "out of" the "No Net" via). Note that I do *not* have to escape out of place-track mode to switch to "Ignore Obstacle" and re-start.

While placing track, the shift+R cycles through "Avoid Obstacle" (my favorite default), "Push Obstacle", and "Ignore Obstacle" modes. The current mode is displayed in the status bar. You might find "Push Obstacle" helpful in tightening up busses.

Later I do a "Design | Netlist Manager | Menu | Update Free Primitives From Component Pads" which changes the net of those "No Net" pads and traces to the net to which I just connected them, to make DRC happy. That update seems very slow on large boards -- be patient. -- David Cary

Q: How do I do "Auto Hugging" ? Auto Hugging is ... ... ???

A: Did you know that you can auto-push other traces out of the way while laying out a trace ? Start placing a track:

  P T click, click

then hit shift-R until the status bar says "Push Obstacle". Then keep laying track close to, even on top of, traces from other nets. Cool, Eh ?

Remember to hit shift-R to get back to "Avoid Obstacle" when you're done. Also, be sure to run a DRC check before releasing this board, because "Push Obstacle" occasionally doesn't push the other tracks far enough away. (bug/enhancement request: handle placing vias better).

Q: How do I change the color of the Connections layer ? "Tools | Preferences... | Colors", click on the color patch next to "Connections", doesn't seem to do anything.

A: I hope Protel fixes this in the next rev. Meanwhile, While looking at the PCB, under the "Browse PCB" tab at the left side, select "Nets | Edit... | Global", change the color, "OK". (BTW, it's fun to click on the net names in that list). [FIXME: was at was . Did that dissapear ? Is relevant ? ]

"Unfortunately the setting is not maintained as application preference after FILE--->Exit." -- Richard Pikacz on 2000-08-24.

Working with polygons

Some people like to place polygons first, before placing any components, then use the "plow through" setting. Others like to hold off until the board is mostly routed, so it's obvious where polygons should go.

Q: How do I punch a hole (no copper) in the middle of a polygon (solid copper) ?

A1: Draw tracks on the keep-out layer (punches holes in every layer) or draw tracks with the keep-out property on same layer as the polygon.

A2: ``What I do is use a 0.1 mil track to draw features that keep the polygon pour out of select areas. They have a no-net attribute, and conform to existing design rule clearances. During fab, they probably get over-etched into oblivion, but even if they don't, the design rules should have kept them from causing any problems. These tracks can then be left to be persistent, and no worries of having to delete, move, or re-create features every time you need to re-pour or DRC check.'' -- Bruce Walter

Then re-flow the polygons (double-click the polygon, OK, Yes).

(This is different for a #power_plane )

From: Duane Foster 
Date: 2000-08-01

> Once I tried checking 'remove dead copper' and
> the area where
> the pour should be briefly flashed but no filled polygon remained.

Danger Danger Danger
That polygon which disappeared is still there.  When you pour another
polygon on top of it, Protel really bogs down.  There is a tech note on
finding hidden polygons and removing them.  The best course is to delete it
when you realize when you have created a hidden polygon (since you just
placed it, you should be able to find it, select and delete it, even though
you cannot see it) (You can also revert to a saved copy if you have saved
before pouring)

This little nuance wrecked my first day with Protel98, new users always
gravitate towards those trouble spots!

Duane Foster

Placing Polygons: Many early PWB designs used the "cherry pie lattice" (hatched) for large copper polygons, using something like a 12 mil track, 24 mil grid. This is because early solder mask didn't stick well to metal, so the array of little square holes in the metal let the solder mask stick to the board better.

Current design practice uses completely solid areas of metal -- for example, 12 mil track, 0 mil grid [*], and 12 mil minimum primitive. [*] "Grid zero causes Protel to pour the grid with tracks exactly next to each other." -- Abdulrahman Lomax

Sometimes polygons are just in the way. There are several ways to temporarily get them out of the way:

You usually don't want to Cut and Paste polygons -- the net of the cut polygon is forgotten, and the pasted polygon is "No Net".

"You can never know too many ways of doing something." -- Pat Nystrom

Q: Is there a way to re-pour ALL polygon planes without double-clicking on each one, forcing a re-pour ?

A1: Jason Morgan [mailto:jason.morgan at] Tuesday, June 05, 2001 2:17 AM created a Server to re-pour all polygons. Ian Wilson put Jason's server online for free download at .

A2: select | all, move everything 1000 mil up, then select | all, move everything 1000 mil back down. Say ``yes'' to repour polygons.

Working with power planes

Q: How do I punch a hole (no copper) in the middle of a plane (solid copper) ?

A1: Protel automatically does the Right Thing for vias and through-holes that don't connect to that plane.

A2: flip to the appropriate power plane layer (use the tabs near the bottom of the screen), then place track, fills, even polygons in the exact shape of the desired hole. (This is different for #polygons )

Connections to power planes:

Never put "thermal relief" on a via. Always make vias "direct connect" to any polygons or power planes of the same net.[*]

Q: How do I do this ? -- Tom Reineking

Protel does this properly by default for polygons when "Pour over same net" is enabled for that polygon. (The "Design | Rules | Manufacturing | polygon connect style" only applies to "pads".)

Protel does not (yet) do this properly by default for power planes. You must set up rules under "Design | Rules | Manufacturing | power plane connect style" for proper power plane connections. I have 2 rules set up here:

  1. All vias: PlaneConnect_1: connect: Direct, scope: Via Specification: (the Via Selection box has five via selection criteria, each with a check box. Make sure all boxes are empty. An unchecked box is a "don't care" selection criterion.).
  2. All pads: PlaneConnect_2, connect: Relief, scope: Board. ... entries: 4.

-- Michael Beavis and Abd ul-Rahman Lomax

Don't forget some of the clearance rules, and the polygon rules, will restrict the amount of copper poured. This could result in a pad or via that doesn't connect to the pour.

[*] If you *don't* want it to connect, then make it a different net in the schematic, perhaps using the "virtual short" component.

If you *do* want a thermal relief, make it a "pad", not a "via". Select the vias and do Tools|Convert|Convert selected vias to free pads. -- Andy Gulliver

Then update the design rule for relief polygon connection to those pads. [bug: There appears to be a design rule for relief polygon connections for vias. But it doesn't do anything -- they are always direct-connect].

The spokes of "thermal relief" are only used for holes where through-hole components mount. ``Why anyone would want to thermally relieve a via is beyond me.'' -- Abd ul-Rahman Lomax

[bug: there *should* be an "Object Kind" entry in the drop down list of the "Filter Kind" combo box -- Geoff Harland]

[bug: Protel *should* do this properly by default for power planes, just like it already does for polygon planes. ]

[bug: if you pour a polygon over a via, with "pour over same net" turned off, the via will not connect to the polygon. The DRC (Un-Routed Net Constraints) will not detect this unconnected via, even if I route a (GND) track to it! Workaround / Moral: *always* turn on "pour over same net".]

libraries of schematic symbols and layout footprints

see Making your own symbols #symbols , and making your own footprints #footprint .

(where to get symbols for your schematic)

(where to get footprints for your layout)

Brian Guralnick has generously donated a library with both "schematic components" and "PCB footprints" ("land patterns") at [FIXME: has moved elsewhere ?] and "all schematic discrete components are optimized for the schematic capture display. They are super compact. The pcb foot prints are also space optimized." ``Except for double diodes, discrete component pinouts are B,S,E, G,S,D, A,K instead of pin numbers for matching footprints within your own footprint libraries.''

Protel keeps putting updated parts libraries on its web site: Protel Libraries /* was */ and /* was */ and /* was */ .

Q: What's the quickest way to print a page that lists *all* the footprints of a pcb library ? Looking at a page full of footprints at once is much faster than scrolling through the library looking at one at a time. (Especially with several pcb libraries full of parts).

A: "Geoff Harland" on 2001-05-24 08:39:28 PM writes: (lightly edited by the FAQ maintainer):

  1. Create a new blank Pcb file.
  2. Open the pcb footprint library file (``.lib'') you're interested in, and look at one of the footprints.
  3. With the Design Manager panel on, select the "Browse PCBLib" Tab while you have the Pcb Library file concerned currently selected.
  4. Using the left mouse button, click on the *first* footprint listed in the Design Manager panel.
  5. While holding a Shift key down, (left mouse button) click on the *last* footprint listed in the Design Manager panel. *All* of the footprints listed in the Design Manager panel should now be in a highlighted state.
  6. While the cusor is located over the area listing these footprints, right-mouse click, then select "Copy" from the resulting popup menu.
  7. Switch to the (blank) Pcb file, then do ``Edit | Paste'' and click in the PCB area. One copy of each of the footprints will then be pasted into the Pcb file. Now all the components are in a pile where you clicked.
  8. Select the components (perhaps with "Select | All").
  9. From the Component Placement toolbar, select the ``Arrange selected components within defined area'' icon. (If you let the mouse pointer rest on any icon for a couple of seconds, a short line of text pops up explaining that icon.) Click in the PCB area 2 or more times to space out the components.
  10. [optional] Add a string to the Drill Drawing layer, with a caption of .LEGEND (this is a Special String), and preferably place this in the lower left hand corner of the Pcb file.
  11. [optional] Run a process to set the Comment field of each component within a Pcb file equal to its Footprint (string). Geoff Harland wrote a PcbAddon Server to do this.

There's several different things you can do at this point.

Q: Which footprint should I use ?

A: Unlike through-hole components, there is no One True Footprint for a SMT part.

My understanding is that IPC footprints are (were ?) optimized for (c) wave soldering, so many people use smaller footprints that work fine for their process (a) or (b).

There is a (free) online land pad calculator from IPC, .

Bugs in the Protel footprint library (Have these been fixed already ?)

design release to manufacturing (CAM)

You generally want to archive the "original", "as-released" version of the files just before you generate Gerbers. Here is one common sequence:

  1. 1. Exit Protel. From the "File Explorer", right-click-and-drag on the ".ddb" file (or on your design folder), drag slightly, and select "Copy Here" from the pop-up menu. This creates a "Copy of ..." file in case I go click-happy in step 2.
  2. 2. Double-click on the ".ddb" file, starting Protel. Click on the "Documents" tab. Delete the old "CAM for ..." folder and those obsolete ".txt", ".rep", "Copy of ..." files. Click on the "Recycle Bin" and empty it.
  3. 3. Click on the little down-arrow icon just to the left of Protel's "File" menu. Select "Design Utilities". When the "Compact & Repair" dialog box appears, activate "[Y] Perform Compact after closing design | Close".
  4. 4. Exit Protel. It churns for a long time "compacting". Some people find this so annoying that they usually disable "[ ] Perform Compact after closing design". Then (from the "File Explorer"), right-click on the ".ddb" file, select "Properties", and activate "[Y] Read-only | OK". You will note that this file is *much* smaller (1/4 the size is typical) than your previous "Copy of ..." file, even when it contains exactly the same files. Archive copy(ies) of this file somewhere safe (a write-once CD-ROM ?). (I think Protel 99SE s.p.6 was the first to be able to read read-only ".ddb" files)
  5. 5. Double-click on the ".ddb" file, starting Protel. Click the ".cam" file and hit F9 to generate Gerbers. Some people archive these in the same place as the ".ddb" from step 4.

Just before sending these Gerbers out, it's a good idea to go through a check list /* was */ . Most people have a text file associated with each project listing ``things to remember to do before sending out the Gerbers''. [FIXME: other useful check lists ?]

``Standard Operating Procedure for Protel users should be, before releasing a job for production, to reload the net list and see what macros are created. Normally, if *any* macros are created, it means that something is wrong.'' -- Abd ul-Rahman Lomax on 2001-01-30 03:42:55 PM

Some board houses want a ``SMD pad count'' to help them calculate their price quote. Under ``Reports | Board information... | Report...'' there's lots of data. Dennis Saputelli takes the number of pads+vias and subtracts the number of holes to get the ``SMD pad count''. Some people think that the ``pad paste mask'' ought to equal the ``SMD pad count'', since paste is only needed on SMD pads. But Protel apparently puts paste on every pad, even through-hole pads. (This is a feature if you're using pad-in-paste to solder your through-hole components). is one of the companies that makes Paste stencils.


Many people export Protel schematics to .PDF files. Two methods: (a) "print to file" using a Postscript printer driver, then using (freeware) Ghostscript to convert to .PDF, or (b) using Adobe's proprietary software.

Q: Has anybody figured out a way to print a batch of PCB .PPC files so they end up as pages in a .PDF file? Works nicely when printing the pages of a schematic project. -- f12

A1: Run the PcbPrint:PrintDocument Process with the parameter of:


This will produce one Acrobat file for *all* of the defined Printouts, rather than an Acrobat file *per* (defined) Printout.

In the default (Power Print Server) menu, select 'File/Print Job' to produce this outcome. -- Geoff Harland.

A2: I figured out that in 'Browse PCB Print' under the listed printer you go to Properties>Insert Printout, then you can set up other printouts which will be printed as separate PDF pages from the same .PPC file. -- f12

Q: How do I arrange the order of the sheets in a project so that they are in the order that I want, and that they print in that order ? -- lloyd A:

`` ... with the Edit/Move/Send to Back and Edit/Move/Send to Front commands.

The schematic pages print out in the order that they are displayed in the hierarchy display on the Explorer window. By selecting 'Send to Back' and clicking on a sheet symbol [the sheet symbols on your top-level block diagram schematic] , you actually push it to the top of the hierarchy and make it print first. I normally go through my schematic and start by clicking on the last page that I want to print out and click on them one at a time until I get to the first page. (You could start with the first page if you used the Send to Front command instead).

Note that to get the hierarchy window to update, you need to right click on the DDB and select refresh. ''

Mike Coward Continuous Computing on 2001-03-23

printing schematics

Besides printing to a printer, lots of people "print" to ".pdf" files.

1. I use only A4 size schematics. That implies almost every time using a
hierachical design. Not everybody's taste, I know.
2. We use Adobe Acrobat documents (*.PDF) and email as our main way of
communication. That's a way most customers can deal with, and the resolution
should be good enough even with downsized A2 documents.

-- Heiko Vachek elektronik 21 GmbH on 2000-08-23 06:34:32 AM

If you have a choice, don't
draw A2 schematics or larger, they are more hassle for everyone. Few people
now have large enough format printers and copy machines. If the text size
is large enough, an A2 might be readable on a fax in fine mode if directly
sent (not printed to paper first).

-- Abd ul-Rahman Lomax on 2000-08-23 03:36:51 PM

What I do is to use Adboe Acrobat 4.0 for a cost of $250.00.  Using this allows me to
create a .PDF file in which anyone can read with an Acrobat reader which seems to be
the Internet Standard.

-- Dave Adams on 2000-08-23 07:02:08 AM

then the ONLY thing you need to do is "print" out your protel
schematic, but select the pdf printer, and instead of a hardcopy you
get the pdf files.  refreshingly simple in a world filled with complex

-- Robison Michael R CNIN on 2000-08-23 06:59:45 AM

Ghostscript is a free postscript viewer with the ability to convert postscript files to PDF.

Not quite so convenient as Acrobat, but then it only costs a download.

Start here and get Gsview also.

-- Terry Harris on 2000-08-23 11:48:34 AM

... with P99SE sch, pcb files printed to .prn files. After conversion with GSview from prn to pdf files, all is readable and "zoomable" with the free Acrobat Reader. Your solution work fine with "big" sheet format too. ... -- Rudolf Schaffer on 2000-08-24 05:19:06 AM

You can also make PostScript files, and view with GhostScript,
or print on any PostScript printer.  These will come out quite sharp,
even printing a B-size schematic on A paper.

-- Jon Elson on 2000-08-23 05:04:22 PM


Nearly all PWB designers generate Gerber files of their layout to send to the board house for manufacturing.

Q: "Is there any way to direct the Gerber outputs to a location of my own choosing?" -- Steve Allen

A: Click on the ".cam" file, so you see the things it's about to generate with the little square checkboxes. Then hit "Tools | Preferences...", and in the section titled "Export CAM Outputs", hit the button labeled "..." and select the appropriate location on your hard drive. If you haven't set up CAM yet, it's easy. While viewing your PWB in the editor, hit "File | CAM Manager". This starts a Wizard that asks a bunch of nosy questions, and when you're done there should be a new ".cam" file in the "Documents" folder. Once you're done, you'll probably want to right-click and select "Insert NC Drill"...

Q: While looking at the Gerber files (using Camtastic or another Gerber viewer), the drill points don't line up with the other layers !

A: While looking at the CAM file "CAM Outputs for...", right-click on "Gerber Output", select "Properties | Advanced", and disable "[] Center plots on film".

Q: What does activating "[X] Center plots on film" do ?

A1: It doesn't help anyone, and it only leads to confusion when you try to view these plots with a Gerber viewer. "Never, ever, turn on the "center plots on film" option when generating Gerbers." -- Steve Hendrix"

A2: "It gives an offset to the gerber data such that the plot will be centered on the film. Thus such a plot will not match the drill file, which has no offset." -- Abdulrahman Lomax

Gerber viewers

Board houses want to feed Gerber files into their plotter machines. It might be a good idea for you to look at the Gerber files that Protel creates before you send them to the board house.

Gerber file viewers (not in any particular order)

[FIXME: would like short review comparing these tools]

"Have a look at for CAMCAD viewer for Protel, Accel, DXf, HPGL and more" -- Wolfgang [Apparently this views the Protel ".pcb" file format as well as Gerber, DXF, etc.]

GerbTool [FIXME: offline ? ]

GraphiCode, Inc. : GC-Prevue 8.0 Win95/NT

Lavenir Technology, Inc. : ViewMate | also has a "Gerber to PostScript Converter"

Router Solutions, Inc | | | |

Camtastic [now bundled with Protel]

These web sites have lists of Gerber file viewers:


"the Camtastic stuff is pretty good. The
new 2000 LT (the full 2000 isn't out yet) works well for me.
Like it a lot more than the Lavenir stuff I've got. Most PAD's houses I know
use the old DOS Lavenir and swear by it. I guess it's a matter of choice.

As to bringing in the drill file into Camtastic, it allows you to select and
snap the move to the board reference (either outline endpoint or object
center if you use a ref hole)."

part fields and the bill of materials (BOM)

See also part_type

Q: ``what's the best way of generating BOMs ?'' -- Matthew

A: ???

Many people export a BOM and manually pretty it up in Excel. We all wish there was an automated method.

If you export to ".csv" format, the ".csv" file has to be renamed to a ".txt" so that Excel can import it using the import wizard. Otherwise it will assume 'general' fields and make an 'E' an exponential and truncate size "0603" to "603". -- chris.mogford

Terry Harris is giving away an AWK script to re-format the Protel BOM .CSV files into whatever you like. "I set up a file association for .CSV files to run the processing batch file on them so a formatted part list is only a couple of clicks away." The description field can be any combination of part fields and text you like and the partlist is alpha sorted on the description. -- Terry.

IONOS sells a parametric part database "dCSM" that supposedly interfaces with Protel to generate pretty BOM files -- an excel2000 file in the format you prefer. -- chris.mogford

In Protel99(SE) importing an excel spreadsheet into the ddb automatically truncates each field to 256 characters. ie. unless you have very small boards do not use the protel spreadsheet function. Worse than useless, it is dangerously wrong. The moral is: "Only use the csv renamed to a text BOM function. Nothing else" -- chris.mogford

For complete accuracy, we use the schematic as the reference. It includes the screws, heatsinks, heatsink compound, etc. We use Part Field 16 for a Company Part Number. This then references manufacturer number etc. A typical excel BOM after massaging would have these columns : Quantity|Designators|Company no.|Manuf.|distributor|footprint|part type|part field 1|part field2.

-- Chris Mogford

Part information: Some people put most of this information into the schematic fields of the part. Other people just stick a (internal) reference number in the schematic, then put all this information in a seperate database / excel spreadsheet / text file to look up by reference number. Yuri V.Potapoff 2001-08-03 and "chris mackensen" 2001-08-03 mentioned some of this information:

More part field tips:

Protel to Orcad, Orcad to Protel, etc.

If you are switching from some other tool to Protel or back again, it would be nice if you could get all your schematics and PWB layouts into Protel and out again.

Protel to Orcad, Orcad to Protel, etc.

Converting your schematic into various file formats.

Converting your PWB layout into various file formats. [FIXME: should converting to ".pdf" files go here ?]

Gerber to Protel

Q: [Can] Protel ... import gerber files from another design and turn it into a protel pcb? -- Brad Marshall

A: Camtastic (now bundled with Protel) can view most any Gerber file then translate it into the particular Gerber format Protel PCB editor can read. See

  Importing Gerbers into Protel

BMP to Gerber; BMP to Protel

Q: I have a client who has a very old board ... [no gerber files] but he does have unpopulated pcb's. Does anyone know an easy way to generate Gerber files possibly with a scanner or something? -- Gary Allbee 2000-11-27

A1: Try Artnet . I have used them to scan films to make gerber files, then turned the gerbers into a circuit board. It worked well. They say they can scan actual PCBs. -- Vince Vlach 2000-11-28

A2: After scanning in the board, try this:

I photographed the board with a digital camera, processed the image to increase contrast and to scale it properly, and then imported the graphics file onto a mech layer in Protel using ...

[ the BMP to Protel converter produces polygons for the shaded areas of the BMP. ] ...

[Using that as a template,] I then placed parts and drew track to reconstruct the PCB. A net list was generated from the PCB and marked off against the schematic to find the few errors that were made in interpreting the image. In several places the actual PCB did not match the schematic, even though the board worked. That was not uncommon in the old days....

It is less expensive than doing a new design, but not a *whole* lot less.

-- Abd ul-Rahman Lomax 2000-11-27 07

I did it once this way. I had a only the film of a pcb and I had to do some modifications. ... scan ... Then I converted the bitmap with PCBLogo to a pcb-file. This looked already quite fine, but it wasn't exactly on scale. So I moved all the fills (PCBLogo converts to fills) to a mech-layer and draw the pcb on the copper layer and did the modifications. This PCB is now in mass production.

-- Edi Im Hof 2000-11-28

".pdf" to Protel

Often component manufacturers have a ``reference design'' in Adobe's ".pdf" format.

Yuri V.Potapoff on 2001-07-31 08:46:06 AM wrote:

Step 1st is to convert PDF file to BMP by Photoshop. Then you can use
Klipper utility from Desktop EDA (
This utility imports raster graphic file into PCB or SCH how array of fills
(or lines). You need only adjust the scale.
So you can get Gerber from Adobe' PDF file.
We use this method to restore very old project or to copy another's boards.
Then you can place footprints and generate netlist from connected copper.
If you will have netlist you can add new layers and route pcb with your set
of Desig Rules.
You can see an example on our site.

Best regards,
Yuri V.Potapoff

Protel to Orcad

Protel you first save the file in Orcad Schematic format)...
From: Andrew W. Riley III
Sent: Friday, January 05, 2001 5:28 PM
To: Multiple recipients of list proteledausers
Subject: Re: [PROTEL EDA USERS]: Protel to Orcad Schematic conversion

Mr. Gulley,

I am not sure about Express, but if you are attempting to import the
schematic into Capture;

The '.SCH' extension for OrCAD's schematic is for the older SDT version of
OrCAD (IV & 386+).  When opening '*.sch' files OrCAD expects to see the
config file "SDT.cfg" in either the same directory as the schematic or the
directories set by environment variables such as 'ORCADPROJ' in the
autoexec.bat - created by the installation of OrCAD SDT.
Though you should have one somewhere in your OrCAD (or sub-)directory, I
have included the "SDT.cfg" that comes with OrCAD 9.2 at the end of this
e-mail - just in case.  I believe that Capture wants the libraries
containing the parts used in the schematic.  With version 9.x of Capture, it
is possible to bypass the "SDT.cfg" file IF the SDT libraries are in the
same directory as the SDT schematic.
I have had to re-create symbols when I did not have the correct libraries,
but the rest of the schematic(s) made it through.

If I can be of any more help, please e-mail me at <drewmeister3 at>
or ICQ me at 100686794 so as not to clutter Protel's list with OrCAD stuff.

"Abd ul-Rahman Lomax" on 2001-06-18 03:15:52 PM wrote:

Subject:	Re: [PEDA] Importing Ocad

At 02:07 PM 6/18/01 -0400, Steve Smith wrote:
>Go to page 167 of the Protel 99SE manual and follow
>the instructions there.  They always worked for me.

Another already mentioned p. 167 of the 99SE manual (which is available as
PDF on the Protel web site).

However, those instructions relate to Capture v. 9 imports. Other versions
are more complex to deal with. My advice: using eCapture (see recent posts)
import OrCAD -- any version -- to eCapture and write as version 9. Then
import to Protel.

Versions earlier than Capture require the presence of libraries and
SDT.CFG. If you don't have the libraries, for these earllier schematics,
you have almost no hope of import. Some of the data simply is not there.

Abdulrahman Lomax

Orcad to Protel

Protel will load Orcad Capture version 9 DSN files. If you look at a OrCAD file with a text editor, you usually can see the version near the beginning.

If you have some earlier version of Orcad DSN file, use eCapture 9.2 from to load it in and write it out to version 9.

DXF to Protel

(see also microwave circuit layout tips #microwave )

import a DXF into an open PCB file. If you import the DXF into the database and try to open it then it does just stuff Protel. The DXF/DWG import into PCB is still not the most reliable of creatures even so. ... Usual Protel DXF import rules apply: everything MUST be in the positive quadrant and all must fit within the 100"x100" limits of the PCB.
-- Rob Malos on 2001-01-31 02:27:53 PM ....

Watch for the "scale bug". Sometimes Protel makes a file 24.5 times too big (or small ?). This seems to be a bug in the Imperial-->Metric conversion.

Sometimes when Protel doesn't want to import a DXF file, you can open it in Camtastic, then do "Open | Save" to create a ``new'' DXF file that Protel will accept. [tip from Darren Moore]

Protel to DXF / DWG

It's very easy to export Protel schematics and PWB layouts to Autocad DXF or DWG format. Then people can use freeware DXF / DWG viewers #dxf_viewers to view it, zoom in and out, etc., as well as importing it into most mechanical design packages to make sure the connectors, etc. on your board line up with the mechanical case.

While looking at the PWB layout, choose ``File | Export'', navigate to where you want the DXF file, type in an appropriate filename, hit ``Save'', then you'll get a dialog box. Choose DXF (or DWG) and you can change a few other options. Then hit ``OK'' and it's saved.

DAV: I prefer to export to ".dxf" format rather than ".dwg", because the exact same file in "" format is smaller than in "" format.

CadSTAR to Protel

"Steve Fallon" on 2001-08-02 10:33:12 PM wrote:

To:	"Protel EDA Forum" 
Subject:	Re: [PEDA] HELP. Converting old pcb

I recently wrote a converter to take old CadSTAR boards and convert them in
to ASCII Protel PCB 2.8. It works fine. It did need the CadSTAR board to be
in its ASCII .cdi format, but I guess I could write one for the default
binary .cdo.

Let me know if you want a copy.

Rgds Steve F

other conversions

How do I customize the menus ?

Many people use Protel without any customization.

Q: How do I customize the menus ? [simple tutorial]

Q: check out ``Comprehensive applications note including a complete tutorial and code for all of the example macros.''

"Geoff Harland" on 2001-05-27 06:55:14 PM wrote:

You should never edit any of the .ins files, as these inform Protel of what Processes are provided by the corresponding Server.

However, if due care is exercised, it is possible to edit the (ASCII/text format) CLIENT99SE.rcs file, which is found in the Windows directory. It is customarily so large in size that Notepad can *not* be used to edit it, and when some other editor is used, it is important that the file be (re)saved in ASCII format (rather than some other format, such as those used by (for instance) Word or Write files).

For the most part though, it is generally better to let Protel itself make any changes to this file, and this will occur (as appropriate) if you customise the resources. If you double-click on the menu bar, a dialog box will be invoked, which will permit you to customise your menu resources. By double-clicking on the title bar (and/or non-button occupied area) of a Toolbar, it is similarly possible to invoke a dialog box which permits you to customise the Toolbar concerned. It is also possible to customise your Shortcut resources, though invoking the associated dialog box is not so straightforward (though this can be facilitated by defining a Shortcut key to invoke this dialog box, and as such, is a "bootstrap" means to facilitate *succeeding* changes to your Shortcut resources).

When a resource is added or edited, you always specify a Process, and optionally specify one or more parameters. (*When* these are provided (which is not always the case), the .HLP file for each Server lists which Processes are provided by each Server, and which parameters (if any) can be used with each of these Processes). In the case of menu resources, you also have to specify what text will be displayed by the menu entry; you can optionally use (no more than) one ampersand (&) character to stipulate that the *following* character will be underlined, e.g. Poly&gon will result in the 'g' character within Polygon being underlined in the resulting menu entry. In the case of Toolbar resources, you typically specify which .BMP file is to be used with the associated button, and the size of this file (# of pixels wide, and # of pixels high) must match that of the files used on existing Toolbar buttons. (I can't remember this size off-hand, but I do recall that the width and height are identical.) You can also optionally specify (by a parameter) what "bubble help" will be provided when the cursor is moved over the corresponding button (in the Toolbar). (It is also possible, by the use of an optional parameter, to specify what text will be displayed in the Status Bar when a particular menu item is being "navigated" over.) And in the case of Shortcut resources, you also have to specify which key combination is to be used with this, e.g. Alt-F12 or Ctrl-Q, etc. (It is also possible to specify that a shortcut key be invoked after *two* consecutive key combinations have been entered, but this is not an option which I have used myself, or at least not to any significant extent).

(Paintbrush can be used to prepare bitmap files for your customised buttons within Toolbars. But be sure that the dimensions of your .BMP files match the dimensions of the .BMP files used by the existing/provided buttons within Toolbars.)

You could do a lot worse then read the on-line help and written documentation provided on how to customise your resources. The above description is really just a summary of what is involved.

Memo to anyone preparing FAQ files for Protel: consider including the above material in a question on customising Protel's resources.

Geoff Harland.
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How do I customize the fonts or use accented letters ?

fonts on the PWB

  • Q: How do I get foreign characters on my PCB ? (such as the common engineering symbols ± µ Ω and the Deutch letters Ä Ë Ï Ö Ü ß ä ë ï ö ü and other foreign symbols like Å Ñ ñ ) -- (paraphrased from Tommy Åkesson)
    A: I put together a web page about this a while ago. Check it out at: /* was */ -- Paul Hutchinson 2001-06-07 [ Web page maintainers: there's a convenient list of symbols at ]

    fonts in the schematic

  • ``Font size is editable in the [schematic] editor. Pin fonts use the system font, which is selectable at Design/Options/ChangeSystemFont. Part Type and other such fields are directly editable to change the font.'' -- Abdulrahman Lomax

    bibliography for schematic editor:

    If you're using the schematic editor, you're probably designing circuits. The classic reference is commonly known at "Horowitz and Hill" or "AoE":

    _The Art of Electronics_ (2nd edition) by Paul Horowitz and Winfield Hill. (Not to be confused with the "other" AoE, )

    Other, more specialized books:

    [Any other must-have, highly recommended books ?] ----

    Bibliography for layout editor:

    If you're using the layout editor, you might want to look at these items: "Design for Manufacturing"

    [Any other must-have, highly recommended books ?] ----

    miscellaneous work-arounds

    advice on learning PCB design

    [FIXME: merge with bibliography ?] [FIXME: split into seperate CAD-independent FAQ ?] ``Dedicated to the free exchange of data in a constantly evolving environment.''. Has lots of footprint libraries. (Sometimes footprints are called ``decals'' or ``land patterns''). Lists ``the wind river standards'' for component footprints. Also has tools for calculating stripline trace impedance, current handling trace widths, checklists used in the design process, ``Clutter Control'', and online discussion forums.

    Copper Connection "you might find this useful" -- Melvin Hart Burk Jr., PASCO scientific "Mary Snugden [at Copper Connection] is an excellent instructor, funny too!)" -- Brad Velander Norsat International Inc.

    The PCB Design conferences "not the best for newbies ... [but] ... a lot of information from the sum total of your seminars at the conference. ... a cheap alternative to taking many individual courses offered at differing times in differing locales. The number one benefit I have found at the conference is the acquaintances that you can make with designers near and far ... you also get to make contacts with tool suppliers, fabricators and design bureaus." -- Brad Velander Norsat International Inc.

    SMT+ "I would also recommend highly "SMT+" " -- Brad Velander Norsat International Inc.

    From: Brooks Bill
    Sent: Wednesday, August 02, 2000 11:10 AM
    Subject: RE: [PROTEL EDA USERS]: Advice on Learning PCB Design
    Andy... I am trying to put together a website to address this very issue...
    It's still under construction but you may find some of what you are looking
    for under 'education' in the Navigation menu on the left side of the page.
    Here's the link -
    I will be adding more to it as time goes on... make sure to check back
    Bill Brooks
    Senior PCB Designer - mailto:bbrooks @
    Zoneworx, Inc.
    40925 County Center Drive, STE 200
    Temecula, CA 92591
    Tel: (909) 296-1226 x 1037
    Co-Director / Education Officer / Webmaster
    for the San Diego Chapter of the IPC Designers Council


    mailing lists:

    A few general PWB design tips (general design):

    related products

    Many other companies make products that complement Protel.

    microwave circuit layout tips

    Microwave circuits are much more sensitive to layer stackup than slower circuits.

    layer stackup

    layer stackup information.

    See layer stack-up text

    reference designators

    reference designators (Is ``reference designations'' the same thing ?) [general PWB design]


    [What to do with useful stuff not directly Protel related ? Is there a FAQ on PWB design in general ?]

    The Protel Users FAQ was first posted by David Cary on 2000-04-03. -- David Cary

    end Protel Users FAQ ( errors ) /* was */